Project
CUDA SGEMM Optimization
A progression from naive matrix multiplication to shared-memory tiled SGEMM, benchmarked across sizes with conflict and anomaly analysis.
CUDA C++ · SGEMM · GPU Optimization · Benchmarking
Product Snapshot
- Role
- Parallel implementation and benchmarking
- Users
- Systems developers learning GPU memory hierarchy and matrix-kernel optimization.
- Stage
- Baseline, shared-memory tiling, size tests from 256 to 2048, and report completed in 2025.12-2026.01.
- Focus
- CUDA memory access, tiling, throughput measurement, bank conflicts, and anomalies.
- Validation
- The project report records 999.51 GFLOPS at 512×512, an 85.5% improvement over its baseline.
- Public Proof
- CUDA C++ implementation, multi-size benchmark data, and performance report.
Next Step
The problem
Matrix multiplication is a useful GPU exercise because the arithmetic is simple while performance depends on thread organization, memory access, and reuse.
Implementation
I built a naive CUDA baseline, added shared-memory tiling, and tested matrix sizes from 256 to 2048. The analysis compared GFLOPS and examined bank conflicts, size effects, and anomalous runs.
Result
The report records 999.51 GFLOPS for the optimized 512×512 case, 85.5% above the project baseline. That result is tied to the recorded hardware and test conditions and is not generalized across devices.
What I learned
Performance work must preserve implementation, measurement conditions, and anomaly analysis together. A peak number matters only when its benchmark context is traceable.
Configure the public Giscus environment variables to open discussion on the public site.